Assembly and Packaging Laboratory

Technologies & Processes

The development of smart and cost effective packaging solutions for silicon photonics is integrally connected with the competent design of efficient coupling structures, requiring innovative coupling structures for low coupling loss and large alignment tolerances, as well as passive alignment to make easier the alignment of the SOI device with the optical fiber, thus offering the possibility of low cost device assembly.

General Packaging process once a silicon photonic wafer has been manufactured.

Bonding process scheme

Main technology


Fiber pigtailing ought to implement a reliable joint between a photonic device and a single fiber or a set/array of single-mode fibers. Pigtailing is a fundamental prerequisite for testing and application of photonic devices, and is also the first step of packaging process. Keeping in mind applications in telecom, a fiber-device joint should introduce as little as possible additional loss, low back-reflection, and low polarization dependence. Following the study of fiber coupling in previous sections (vertical and horizontal), we may distinguish between two kinds of pigtailing presently used in silicon photonics:

Horizontal pigtailing Vertical pigtailing

Horizontal (left) and vertical (right) pigtailing


Process of attaching a die (or chip) to a substrate, package or another die. This process takes many forms and can be applied in many different ways. These differences are entirely dependent on the desired application of the user. The joint may be of polymer (adhesive), metal-filled polymer, or in the form of solder derived from a preform, solder paste, or solder wire.


Method by which a length of small diameter soft metal (usually gold or aluminium) wire establishes electrical connections between an integrated circuit (IC) or other semiconductor device and its package or to connect from one PCB to another without the use of solder or flux. The wire diameter must be compatible with the semiconductor pad area and therefore quite thin (common wire sizes range from 15 to 25μm).

Wire-bonding image Wire-bonding image


Flip chip assembly is a key technology for advanced packaging of microelectronic circuits. It allows attachment of a bare chip to a packaging substrate in a face-down configuration, with electrical connections between the chip and substrate via conducting “bumps.” This technique offers many advantages. A key advantage is improved electrical performance. The small bumps of flip chip interconnection provide short electrical paths, which yield excellent electrical properties with low capacitance, inductance, and resistance. This results in greatly improved high frequency performance as compared to other interconnection methods such as wire-bonded chip on substrate. Another important advantage of flip chip assembly is its compactness which reduces the size and weight compared to traditional wire bonded packages. The electrical connection pads on the chip and substrate surfaces can be laid out as an area array, rather than around the periphery of the chip which is a typical design for wire bond configuration.

Solder bumps image flip-chip image

Solder bumps (left) and flip-chip technology (right)

Main processes

  • Dicing
  • Die Bonding, Flip-Chip Bonding
  • Tacking, In situ reflow, Eutetic bonding
  • Thermocompression
  • Single-Step solder ball placement
  • Flux-free reflow with laser
  • Flux less / solder paste / void free soldering
  • Thermo compression wafer bonding
  • Wafer bump reflow
  • Wire bonding
  • Ribbon Bonding
  • Splicing
  • Vertical and horizontal alignment and pigtailing
  • Package lid sealing